Files
librenms-librenms/includes/polling
Albert Siersema cd362b7983 Fix missing PoE port graphs for Cisco Catalyst 9K (#11698)
* Fix missing PoE port graphs for Cisco Catalyst 9K

* Reworked code: 2 assignments, added tests

* Simplify code

Checking the MIBs...
CISCO-POWER-ETHERNET-EXT-MIB: AUGMENTS { pethPsePortEntry  } 
POWER-ETHERNET-MIB: INDEX { pethPsePortGroupIndex , pethPsePortIndex  }

This means cpeExtPsePortEntry is always indexed by exactly 2 values.  No point in populating slot.subslot.port

Co-authored-by: Tony Murray <murraytony@gmail.com>
2020-06-04 22:10:06 -05:00
..
2020-05-30 17:43:41 -05:00
2018-02-01 23:35:23 -06:00
2020-04-18 00:37:56 +02:00
2020-04-04 07:41:22 -05:00
2020-04-03 08:41:24 -05:00
2020-04-03 10:37:08 -05:00
2019-06-23 00:29:12 -05:00
2019-06-23 00:29:12 -05:00
2018-02-01 23:35:23 -06:00
2019-06-23 00:29:12 -05:00
2019-06-06 16:12:13 -05:00
2019-06-23 00:29:12 -05:00
2019-06-23 00:29:12 -05:00